1. Field of the Invention
The present invention relates to disk drive systems used with computers, and more particularly to the use of multiple disks in an array.
2. Description of the Related Art
Personal computers have been getting ever faster and more powerful at a rapid rate. Significant portions of this advance are due to the increased speeds and data widths of the microprocessors currently available. Microprocessors have gone from 8 bit data widths and operating frequencies of 1 MHz to 32 bit data widths and basic clock rates of 33 MHz. Memory techniques have been developed to, in the greatest part, allow memory system speeds to keep up with the speed of the microprocessor. However, the same speed increases are not true for the various input/output and mass storage systems. The various peripheral devices are often now seen as limitations to the actual speed of a given computer system. If for instance, the personal computer is utilized primarily for word processing applications, then higher disk performance is more important then processor speed in most cases and relative increase in the disk subsystem performance will be much more directly perceived then a given increase in the microprocessor capabilities.
In the past few years, a new type of mass data storage subsystem has emerged for improving the data transfer performance. This subsystem is generally known as a disk array subsystem. One reason for wanting to build a disk array subsystem is create a logical device that has a very high data transfer rate. This may be accomplished by ganging multiple standard disk drives together and transferring data to or from these drives to the system memory. If n drives are ganged together, then the effective data transferred rate is increased in an amount slightly less than n times. This technique, called "striping," originated in the supercomputing environment where a transfer of large amounts of data to and from secondary storage is a frequent requirement. With this approach, the n physical drives become a single logical devices and may be implemented either through software or hardware.
A number of reference articles on the design of disk arrays have been published in recent years. These include "Some Design Issues of Disk Arrays" by Spencer Ng April, 1989 IEEE; "Disk Array Systems" by Wes E. Meador, April, 1989 IEEE; and "A Case for Redundant Arrays of Inexpensive Disks (RAD)" by D. Patterson, G. Gibson and R. Catts, Report No. UCB/CSD 87/391, December, 1987, Computer Science Division, University of California, Berkeley, Calif.
In general these previous techniques have used several controller boards which could access multiple drives over a small computer system interface (SCSI). Multiple SCSI controller boards were used, with multiple drives connected to each controller board. Software resident in the host computer itself performed the operation of data distribution and control of the various controller boards and of the specific drives on a given controller board. The host computer was also required to do various parity operations required as preferred in the techniques to reduce the amount of space related to error correction versus actual data storage. Thus, while high disk transfer rates could be developed, the host computer was still tied up performing various control functions.
Recent personal computers have developed bus architectures which are capable of sustaining devices which are called "bus masters." A bus master may take control of the computer system at certain times and transfer data between the bus master and the system memory without requiring the service of the main or host processor. The bus master can then release the bus back to the host processor when the transfers are not necessary. In this manner coprocessing tasks can be developed. Especially suitable for such coprocessing tasks are graphical displays, network interfacing and hard disk subsystem control. The various buses or architectures are exemplified by the Micro Channel Architecture (MCA) developed by International Business Machines Corporation (IBM) or the Extended Industry Standard Architecture (EISA). U.S. Pat. No. 5,101,492, filed Nov. 3, 1989, issued Mar. 31, 1992, and entitled "Data Redundancy and Recovery Protection", which appendix is hereby incorporated by reference, and fully explains. Thus it became obvious to place a local processor on a separate board which could be inserted into these busses for disk coprocessing functions. However, it then became critical, particularly when combined with the disk arrays, to allow optimal data transfer capabilities without otherwise slowing down the various devices and capabilities.